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KaeslinHubert
KaeslinHubert
Computer science
Computer vision
Artificial intelligence
Field-programmable gate array
Signal processing
4
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Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion Using IDW
2016
IEEE Transactions on Circuits and Systems for Video Technology
SchaffnerMichael
K GurkaynakFrank
GreisenPierre
KaeslinHubert
BeniniLuca
SmolićAljoša
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Evaluation and FPGA Implementation of Sparse Linear Solvers for Video Processing Applications
2013
IEEE Transactions on Circuits and Systems for Video Technology
GreisenPierre
RunoMarian
GuilletPatrice
HeinzleSimon
SmolicAljoscha
KaeslinHubert
GrossMarkus
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A low-power transmission-gate-based 16-bit multiplier for digital hearing aids
2008
Analog Integrated Circuits and Signal Processing
CarbognaniFlavio
BuerginFelix
FelberNorbert
KaeslinHubert
FichtnerWolfgang
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A hardware architecture for surface splatting
2007
ACM Transactions on Graphics
WeyrichTim
HeinzleSimon
AilaTimo
B FasnachtDaniel
OetikerStephan
BotschMario
FlaigCyril
MallSimon
RohrerKaspar
FelberNorbert
KaeslinHubert
GrossMarkus
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