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Gary Ditlow
Gary Ditlow
Electronic engineering
AND gate
Parallel computing
Transistor
Computer science
1
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4
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A Hierarchical Transistor and Gate-Level Statistical Timing Flow for Microprocessor Designs
2009
Adil Bhanji
Debjit Sinha
Chandu Visweswariah
Kerim Kalafala
Gary Ditlow
Natesan Venkateswaran
Sachin Gupta
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