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J.-M. Portal

Centre national de la recherche scientifique

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Ultra-High-density 3D vertical RRAM with stacked JunctionLess nanowires for In-Memory-Computing applications

2020 arXiv: Applied Physics
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Active “multi-fingers”: Test structure to improve MOSFET matching in sub-threshold area

2012 ICMTS | International Conference on Microelectronic Test Structures
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A new robust over rail to rail comparator based on DCG-FGT transistor

2012 CAS | International Semiconductor Conference
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Octagonal MOSFET: Reliable device for low power analog applications

2011 ESSDERC | European Solid-State Device Research Conference
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Poly-Silicon gate pre-doping implantation impact on MOSFET matching performances

2011 DTIS | International Conference on Design and Technology of Integrated Systems in Nanoscale Era
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An efficient diagnosis methodology for analog blocks: Application to current reference circuits

2011 DTIS | International Conference on Design and Technology of Integrated Systems in Nanoscale Era
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A novel Dual-Control-Gate Floating Gate Transistor used in VCO application

2011 ISDRS | International Semiconductor Device Research Symposium
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A new experimental method to extract EEPROM tunnel oxide trap density from threshold voltage distributions

2011 Journal of Non-crystalline Solids
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EEEPROM tunnel oxide lifetime reliability prediction based on fast electrical stress tests

2010 Electronics Letters
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Investigation of EEPROM memories reliability during endurance and retention tests

2009 International Conference on Design and Technology of Integrated Systems in Nanoscale Era
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