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A. Pfitzner

Warsaw University of Technology

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Verification of the Model of Interconnection Capacitances Dependence on Further Neighbourhood in the Bus-Microscopic and Electrical Measurements

2007 EDACSM | International Conference on Experience of Designing and Applications of CAD Systems in Microelectronics
- A. Jarosz
- A. Pfitzner
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Geometric dependencies of parasitic capacitances in interconnection buses

2003 EDACSM | International Conference on Experience of Designing and Applications of CAD Systems in Microelectronics
- Adam Jarosz
- A. Pfitzner
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Coupling a Statistical Process-Device Simulator with a Circuit Layout Extractor for a Realistic Circuit Simulation of VLSI Circuits

1993
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