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Jerrell P. Hein
Jerrell P. Hein
Electronic engineering
Clock recovery
Control theory
Delta-sigma modulation
Analog-to-digital converter
2
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26
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A 2.5-Gb/s Multi-Rate 0.25- $\mu$ m CMOS Clock and Data Recovery Circuit Utilizing a Hybrid Analog/Digital Loop Filter and All-Digital Referenceless Frequency Acquisition
2006
IEEE Journal of Solid-state Circuits
Michael H. Perrott
Yunteng Huang
Rex T. Baird
Bruno W. Garlepp
Douglas F. Pastorello
Eric King
Qicheng Yu
D.B. Kasha
Philip David Steiner
Ligang Zhang
Jerrell P. Hein
B. Del Signore
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Citations (26)
DSP-driven High-performance Clock Sources Radically Alter System Timing Architectures
2005
OFC | Optical Fiber Communication Conference
Jerrell P. Hein
Mike Petrowski
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