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M. Izumikawa
M. Izumikawa
NEC
Electronic engineering
Computer science
Underclocking
CPU multiplier
Clock skew
2
Papers
5
Citations
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A current direction sense technique for multi-port SRAMs
1995
VLSIC | Symposium on VLSI Circuits
M. Izumikawa
M. Yamashina
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A 1.5% jitter PLL clock generation system for a 500-MHz RISC processor
1994
CICC | Custom Integrated Circuits Conference
Hiroyuki Igura
K. Suzuki
T. Nakayama
M. Izumikawa
Masahiro Nomura
J. Guto
Toshiaki Inoue
Hitoshi Abiko
Kazuhiro Okabe
Atsuki Ono
M. Yamashima
Hachiro Yamada
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Citations (2)
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