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Manu Baby
Manu Baby
Logic gate
Real-time computing
Automatic test pattern generation
Low-power electronics
Computer science
3
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4
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IJTAG Through a Two-Pin Chip Interface
2020
ITC | International Test Conference
Manu Baby
Bernd Büttner
P. Engelke
Ulrike Pfannkuchen
Reinhard Meier
Jonathan Gaudet
J.-F. Cote
Givargis Danialy
Martin Keim
Lori Schramm
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Timing based DWT approach for at-speed capture power reduction
2011
GCC | Grid and Cooperative Computing
Manu Baby
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Slack-based approach for peak power reduction during transition fault testing
2010
ISQED | International Symposium on Quality Electronic Design
Manu Baby
Vijay Sarathi
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