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Jung Kyu Chae
Jung Kyu Chae
IMEC
Standard cell
Computer science
Topology
Wafer
Fin
2
Papers
6
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CFET standard-cell design down to 3Track height for node 3nm and below
2019
Syed Muhammad Yasser Sherazi
Jung Kyu Chae
Peter Debacker
L. Matti
Diederik Verkest
A. Mocuta
Ryoung-Han Kim
Alessio Spessot
Amit Dounde
Julien Ryckaert
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Citations (1)
Track height reduction for standard-cell in below 5nm node: how low can you go?
2018
Praveen Raghavan
Vassilios Gerousis
Diederik Verkest
A. Mocuta
R. H. Kim
Alessio Spessot
Julien Ryckaert
Syed Muhammad Yasser Sherazi
Peter Debacker
Luca Mattii
Jung Kyu Chae
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Citations (5)
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