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Mark D. Matson
Mark D. Matson
Reduced instruction set computing
Computer science
Out-of-order execution
CMOS
Parallel computing
4
Papers
204
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A 600-MHz superscalar floating-point processor
1999
IEEE Journal of Solid-state Circuits
J. Clouser
Mark D. Matson
R. Badeau
Robert J. Dupcak
Sridhar Samudrala
R. Allmon
N. Fairbanks
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Citations (14)
Circuit implementation of a 600 MHz superscalar RISC microprocessor
1998
ICCD | International Conference on Computer Design
Mark D. Matson
Dan Bailey
Shane L. Bell
Larry L. Biro
Steve Butler
J. Clouser
Jim Farrell
Mike Gowan
Donald A. Priore
Kathryn Wilcox
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Citations (20)
A 600MHz superscalar floating point processor
1998
ESSCIRC | European Solid-State Circuits Conference
Mark D. Matson
R. Badeau
J. Clouser
Robert J. Dupcak
B. Grundmann
Marc E. Lamere
Sridhar Samudrala
R. Allmon
N. Fairbanks
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A 600 MHz superscalar RISC microprocessor with out-of-order execution
1997
ISSCC | International Solid-State Circuits Conference
Bruce A. Gieseke
R. Allmon
Dan Bailey
B.J. Benschneider
Sharon M. Britton
J. Clouser
Harry R. Fair
Jim Farrell
Michael K. Gowan
Christopher L Houghton
J.B. Keller
T.H. Lee
Daniel L. Leibholz
S.C. Lowell
Mark D. Matson
R.J. Matthew
V. Peng
M.D. Quinn
Donald A. Priore
Michael Smith
Kathryn Wilcox
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Citations (170)
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