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R. Lavieville
R. Lavieville
Los Angeles Harbor College
Materials science
gate length
Logic gate
MOSFET
Electronic engineering
4
Papers
7
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0
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Low Temperature Characterization of Hole Mobility in Sub-14nm Gate Length Si0.7Ge0.3 Tri-Gate pMOSFETs
2017
R. Lavieville
C. Le Royer
S. Barraud
G. Ghibaudo
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Statistical characterization and modeling of drain current local and global variability in 14 nm bulk FinFETs
2017
ICMTS | International Conference on Microelectronic Test Structures
T.A. Karatsori
Christoforos G. Theodorou
R. Lavieville
T. Chiarella
Jerome Mitard
Naoto Horiguchi
C. A. Dimitriadis
G. Ghibaudo
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Citations (1)
Low Temperature Characterization of Hole Mobility in Sub-14nm Gate Length Si 0.7 Ge 0.3 Tri-Gate pMOSFETs
2016
R. Lavieville
C. Le Royer
Sylvain Barraud
Gérard Ghibaudo
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Statistical characterization of drain current local and global variability in sub 15nm Si/SiGe Trigate pMOSFETs
2016
ESSDERC | European Solid-State Device Research Conference
R. Lavieville
T.A. Karatsori
Christoforos G. Theodorou
S. Barraud
C. A. Dimitriadis
G. Ghibaudo
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Citations (6)
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