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W. P. Maszara
W. P. Maszara
GlobalFoundries
Electronic engineering
Electrical engineering
Electronic circuit
Logic gate
Parasitic extraction
5
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59
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FinFETs - Technology and circuit design challenges
2013
ESSCIRC | European Solid-State Circuits Conference
W. P. Maszara
M-R. Lin
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Citations (18)
FinFETs — Technology and circuit design challenges
2013
ESSDERC | European Solid-State Device Research Conference
W. P. Maszara
M-R. Lin
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Low-Contact-Resistivity Nickel Germanide Contacts on n+Ge with Phosphorus/Antimony Co-Doping and Schottky Barrier Height Lowering
2012
Bin Yang
J.-Y. Jason Lin
Suyog Gupta
Arunanshu M. Roy
Shurong Liang
W. P. Maszara
Yoshio Nishi
Krishna C. Saraswat
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Citations (17)
32nm high-density high-speed T-RAM embedded memory technology
2010
IEDM | International Electron Devices Meeting
Rajesh N. Gupta
Farid Nemati
Scott Robins
Kevin J. Yang
V. Gopalakrishnan
Joseph John Sundarraj
Rajesh Chopra
Rich Roy
Hyun-jin Cho
W. P. Maszara
Nihar R. Mohapatra
John J. Wuu
Don Weiss
Sam Nakib
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Citations (21)
Effect of source/drain asymmetry on the performance of Z-RAM® devices
2009
SOI | International SOI Conference
N. R. Mohapatra
R. vanBentum
E. Pruefer
W. P. Maszara
C. Caillat
Z. Chalupa
Z. Johnson
D. Fisch
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Citations (3)
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