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Sachille Atapattu

University of Moratuwa

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Predictable Accelerator Design with Time-Sensitive Affine Types

2020 arXiv: Programming Languages
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Replication Package for Article: Predictable Accelerator Design with Time-Sensitive Affine types

2020
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Real time all intra HEVC HD encoder on FPGA

2016 ASAP | Application-Specific Systems, Architectures, and Processors
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