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Tharayil Narayanan Aravind
Tharayil Narayanan Aravind
Computer science
Control theory
Phase-locked loop
Sub-sampling
Algorithm
3
Papers
1
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28nmFDSOIにおける完全合成可能な10.06Gbps16.1mWインジェクションロックCDR
2017
Tharayil Narayanan Aravind
Deng Wei
Yang Dongsheng
Wu Rui
Okada Kenichi
Matsuzawa Akira
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-250dBのFoMを用いたパイプライン型位相補間器を用いた分数NサブサンプリングPLL【Powered by NICT】
2016
IEEE Journal of Solid-state Circuits
Tharayil Narayanan Aravind
Katsuragi Makihiko
Kimura Kento
Kondo Satoshi
Tokgoz Korkut Kaan
Nakata Kengo
Deng Wei
Okada Kenichi
Matsuzawa Akira
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C-12-15 A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator aided DTC
2015
Tharayil Narayanan Aravind
Makihiko Katsuragi
Kento Kimura
Kenichi Okada
Akira Matsuzawa
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