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H. Ghezelayagh
H. Ghezelayagh
Logic synthesis
Integrated circuit design
Chip
Electronic engineering
CMOS
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A 2.0 GHz 4 Mb pseudo-SRAM with on-chip BIST for refresh in 0.18u CMOS technology with LVDS output data bus drivers
2002
ICECS | International Conference on Electronics, Circuits, and Systems
M. Bathaee
Z. Mostoufi
H. Ghezelayagh
A Afkham
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