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Charles Edward Drake

IBM

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A 1 MB, 100 MHz integrated L2 cache memory with 128b interface and ECC protection

1996 ISSCC | International Solid-State Circuits Conference
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SP 23.2: A lMB, lOOMHt Integrated L2 Cache Memory with 128b Interface and ECC Protection

1996
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Addressing devices with low power

1991
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