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David Declercq

École nationale supérieure de l'électronique et de ses applications
Centre national de la recherche scientifique
University of Paris

257

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3840

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Sign-Preserving Min-Sum Decoders

2021 IEEE Transactions on Communications
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A Sub-Graph Expansion-Contraction Method for Error Floor Computation

2020 IEEE Transactions on Communications
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Design of High-Performance and Area-Efficient Decoder for 5G LDPC Codes

2020 IEEE Transactions on Circuits and Systems I-regular Papers
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Reliability Enhancement for Multi-level Cell NAND Flash Memory Using Error Asymmetry

2019 APCC | Asia-Pacific Conference on Communications
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A Probabilistic Parallel Bit-Flipping Decoder for Low-Density Parity-Check Codes

2019 IEEE Transactions on Circuits and Systems
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The Probabilistic Finite Alphabet Iterative Decoder for Low-Density Parity-Check Codes

2019 NEWCAS | International New Circuits and Systems Conference
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Performance Enhancement of Polar Codes in Multi-level Cell NAND Flash Memories using Systematic Encoding.

2019 ISCIT | International Symposium on Communications and Information Technologies
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Layered LDPC Decoders With Efficient Memory Access Scheduling and Mapping and Built-In Support for Pipeline Hazards Mitigation

2019 IEEE Transactions on Circuits and Systems
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A Decomposition Mapping based Quantized Belief Propagation Decoding for 5G LDPC Codes.

2019 ISCIT | International Symposium on Communications and Information Technologies
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An Adaptation of Min-Sum Decoder for 5G Low-Density Parity-Check Codes

2019 ISCAS | International Symposium on Circuits and Systems
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