Trellis-Coded Modulation-Enabled Probabilistic Shaping With Simplified Viterbi Decoder for Bandwidth-Limited IMDD Systems
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In this article, trellis-coded modulation-enabled probabilistic shaping (TEPS) scheme with a simplified Viterbi decoder is proposed. Trellis-coded modulation (TCM) is embedded in the probabilistic shaping (PS) technique to improve the performance of PS signals in bandwidth-limited intensity modulation and direct detection (IMDD) systems. Further, to reduce the calculation complexity of TCM decoding, the constellation partition decision-assisted (CPDA)-Viterbi decoder is proposed which decides the received signal before decoding to reduce the branches. To verify the performance of the proposed scheme, a 32-GBaud TEPS-four-level pulse-amplitude modulation (PAM4) experimental system with 10G-class O-band directly-modulated laser (DML) is built over a 20-km standard single-mode fiber (SSMF) transmission link. The experimental results show that TEPS-PAM4 achieved up to 1.80-dB higher receiver sensitivity than PS-PAM4 at 7% forward error correction (FEC) limit with the same net rate. Moreover, with the multiplications reduced by up to 45.7% compared with the Viterbi decoder, TEPS-PAM4 with CPDA-Viterbi decoder has up to 1.50-dB higher receiver sensitivity limit than PS-PAM4 at 7% FEC.Keywords:
Viterbi decoder
Viterbi algorithm
Iterative Viterbi decoding
Trellis modulation
Modulation (music)
Forward error correction
Viterbi decoding algorithm is an optimal decoding algorithm for convolutional code.A high speed(3,1,7)Viterbi decoder,which includes BMU,ACSU,SMU and CU,is designed and implemented.The Viterbi decoder is implemented and verified in Stratix II FPGA.The verification results show that the data throughput of the Viterbi decoder is 231Mbit/s and the Bit Error Rate(BER) is close to that of theory simulation result in AWGN channel.Compared to other Viterbi decoders,the proposed Viterbi decoder has higher speed and lower hardware implementation cost.
Viterbi decoder
Soft-decision decoder
Iterative Viterbi decoding
Viterbi algorithm
Stratix
Convolutional code
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This thesis proposes a new modified version of Viterbi Algorithm and modification of that algorithm into Soft-Output version of Viterbi Algorithm is also presented. This modification take care of the memory requirement of the SMU (Survivor Memory Unit) into account and using the concept of decoding length(depth), by introducing the finite decoding depth it has been observed that there is improvement in error performance of Viterbi and Soft-Output Viterbi Algorithm. Besides the improvement in Bit Error Rate Vs Signal to Noise curves, some hardware improvements i.e. reduction in size and power consumption in SMU and TBU (Trace Back Unit) is also achieved.
Iterative Viterbi decoding
Viterbi decoder
Viterbi algorithm
Convolutional code
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High-speed, low-power design of Viterbi decoders for trellis coded modulation (TCM) systems is presented in this paper. It is well known that the Viterbi decoder (VD) is the dominant module determining the overall power consumption of trellis coded modulation decoders. We propose a pre-computation architecture incorporated with T-algorithm for Viterbi decoder, which can effectively reduce the power consumption without degrading the decoding speed much. A general solution to derive the optimal pre-computation steps is also given in the paper. Implementation result of a VD for a rate-3/4 convolutional code used in a TCM system shows that compared with the full trellis VD, the pre-computation architecture reduces the power consumption by as much as 70% without performance loss, while the degradation in clock speed is negligible.
Viterbi decoder
Viterbi algorithm
Convolutional code
Soft-decision decoder
Iterative Viterbi decoding
Trellis (graph)
Trellis modulation
Space–time trellis code
Modulation (music)
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The Viterbi algorithm is the optimum decoding algorithm for convolutional codes and has often served as a standard technique in digital communication systems for maximum likelihood sequence estimation. With the Viterbi algorithm, the computational complexity increases exponentially with the constraint length of the convolutional code. Reducing the constraint length (hence the number of states) would permit major simplification in the implementation of the Viterbi algorithm. In this paper, a reduced-state Viterbi algorithm for blind sequence estimation of DPSK sources is presented. It can reduce number of states in the Viterbi algorithm by at least half. The reduced state DPSK Viterbi decoder can be made much faster without any performance loss.
Viterbi algorithm
Iterative Viterbi decoding
Viterbi decoder
Convolutional code
Forward algorithm
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In concatenated codes, the performance of the outer decoder can be improved with a soft output from the inner decoder. Soft output Viterbi algorithm (SOVA) is one such technique when the inner decoder is Viterbi based. However, when the trellis does not terminate to a single final state, the outer decoder performance does not improve substantially. In this work, we propose two methods to restore the performance. Simulation results illustrating the performance of the proposed algorithms are presented.
Viterbi decoder
Viterbi algorithm
Trellis (graph)
Iterative Viterbi decoding
Soft-decision decoder
Convolutional code
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The convolutional encoding with the Viterbi decoding algorithm represents one of the most popular techniques for direct error correction in the communication systems (forward error correction: FEC). This decoding technique has been proposed by A. Viterbi, it is based on maximum likelihood theory. The modification of this algorithm by introducing the soft value on the Viterbi algorithm makes it SOVA algorithm (soft output Viterbi algorithm), this modification gives the algorithm the possibility of quantifying the values of the received bits, so it will give more precise estimation of the decoded bit. The performance of the decoder will be from far more reliable.
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Iterative Viterbi decoding
Convolutional code
Viterbi decoder
Turbo code
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The Viterbi algorithm is the most well-known trellis-based maximum likelihood decoding algorithm. Trellis decoding is used to recover encoded information that was corrupted during transmission over a noisy channel. The Viterbi algorithm is implemented with a Viterbi decoder. High-speed applications require high-speed Viterbi decoders. Therefore, many hardware solutions have been proposed to improve the performance of Viterbi decoders. These hardware solutions explore the properties of the Viterbi algorithm to simplify and improve the architecture of the decoder. In particular, statistical properties of the algorithm are used to design parallel Viterbi decoders with very high data decoding rates. The article focuses on the implementation of high-speed Viterbi decoders.
Viterbi decoder
Iterative Viterbi decoding
Viterbi algorithm
Soft-decision decoder
Trellis (graph)
Convolutional code
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Although Viterbi decoding is widely used in practical systems, only a few studies have been made for the exact error performance. We already proposed analytical technique for a 2-state soft decision Viterbi decoding. In this paper, this technique is extended to bit error probability for 4-state soft decision Viterbi decoding. This employs an iterative calculation of probability density function (PDF) of the path metrics.
Iterative Viterbi decoding
Viterbi algorithm
Viterbi decoder
List decoding
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Trellis decoding is used to recover encoded information that was corrupted during transmission over a noisy channel. The Viterbi algorithm is the most well known trellis-based maximum likelihood decoding algorithm. The Viterbi algorithm is executed by a Viterbi decoder. Different hardware solutions may be considered to implement a Viterbi decoder with different design requirements in terms of area, performance, power consumption, among others. The most appropriate solution depends on the metric requirements of the application as well as on the target technology. Properties of the Viterbi algorithm are used to simplify and improve the architecture of the Viterbi decoder. In particular, statistical properties of the Viterbi algorithm are used to design parallel Viterbi decoders with very high data decoding rates. The article focuses on the implementation of a Viterbi decoder in hardware, including optimizations to improve the area and performance.
Viterbi decoder
Viterbi algorithm
Iterative Viterbi decoding
Soft-decision decoder
Convolutional code
Trellis (graph)
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Trellis decoding is used to recover encoded information that was corrupted during transmission over a noisy channel. The Viterbi algorithm is the most well-known trellis-based maximum likelihood decoding algorithm. The Viterbi algorithm is executed by a Viterbi decoder. Different hardware solutions may be considered to implement a Viterbi decoder with different design requirements in terms of area, performance, power consumption, among others. The most appropriate solution depends on the metric requirements of the application as well as on the target technology. Properties of the Viterbi algorithm are used to simplify and improve the architecture of the Viterbi decoder. In particular, statistical properties of the Viterbi algorithm are used to design parallel Viterbi decoders with very high data decoding rates. The chapter focuses on the implementation of a Viterbi decoder in hardware, including optimizations to improve the area and performance.
Viterbi decoder
Viterbi algorithm
Iterative Viterbi decoding
Soft-decision decoder
Convolutional code
Trellis (graph)
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