Enhanced current path by circularly and periodically-aligned semiconducting single-walled carbon nanotubes for logic circuit device
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Abstract Improving the performance of solution-processed single-walled carbon nanotube thin film transistors (SWCNT TFTs) is essential to their wide usage in next generation large-area electronic devices. However, uncontrollable tube-tube junction and random network formation from conventional solution processes of SWCNTs has limited mobility and on-current level of SWCNT TFTs. Herein, we demonstrate a facile method by switching idea of reducing coffee-ring of the conventionally solution-processed or inkjet-printed thin films. Spontaneous coffee-ring formation of the inkjet-printed droplets is found to enhance directional alignment of SWCNTs in the outer rim of the coffee-rings. The evaporation-driven capillary flow toward the rim inside induces migration of SWCNT and thus forms densely aligned SWCNT rings. Periodic connection of such rings can provide high-current path at a given voltage. Therefore, by additionally forming the periodically connected rings on a pre-established random network of SWCNT in channel area of TFTs, we significantly improved the mobility and I on / I off ratio of SWCNT TFTs without degradations in other electrical parameters such as threshold voltage and subthreshold swing. We also demonstrated all-solution-processed inverters with higher voltage-gain in comparison with conventional ones.Keywords:
Coffee ring effect
In this paper, we proposed a novel voltage-programmed pixel circuit based on amorphous indium gallium zinc-oxide thin-film transistor (a-InGaZnO TFT) for active-matrix organic light-emitting display (AMOLED) with an enhanced electrical stability and uniformity. Through an extensive simulation work based on a-InGaZnO TFT and OLED experimental data, we confirm that the proposed pixel circuit can compensate for both mobility variation and threshold voltage shift of the driving TFT.
AMOLED
Oxide thin-film transistor
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In this paper, we have analyzed the effect of chiral vector, temperature, metal work function, channel length and High-K dielectric on threshold voltage of CNTFET devices. We have also compared the effect of oxide thickness on gate capacitance and justified the advantage a CNTFET provides over MOSFET in nanometer regime. Simulation on HSPICE tool shows that high threshold voltage can be achieved at low chiral vector pair in CNTFET. It is also observed that the temperature has a negligible effect on threshold voltage of CNTFET. After that we have simulated and observed the effect of channel length variation on threshold voltage of CNTFET as well as MOSFET devices and given a theoretical analysis on it. We found an unusual, yet, favorable characteristics that the threshold voltage increases with decreasing channel length in CNTFET devices in deep nanometer regime.
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Channel length modulation
Short-channel effect
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Field effect
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The channel length (L) and width (W) scaling behavior of amorphous In-Ga-Zn-O thin-film transistors (TFTs) have been investigated. The fabricated TFTs have a mobility of ∼12 cm2/V-s, sub-threshold slope (S) of ∼110 mV/decade, threshold voltage around 0.3 V and off-current below 10−13 A. Even though the TFTs with smaller channel length (L ≤ 5 μm) show proper switching characteristics, threshold voltage lowering and sub-threshold slope degradation are observed, while off-current and mobility are not changed. The mobility degradation with L, which was observed in amorphous silicon TFTs, is not seen for short channel a-IGZO TFTs. Lastly, the necessity of the TFT scaling for a pixel electrode in AM-LCD applications is discussed.
Degradation
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A voltage-programmed a-IGZO TFT pixel circuit for AMOLED display systems is proposed in this paper. Compensation schemes together with a simple driving strategy are proposed for threshold voltage shift and mobility variations of the driving TFT, as well as the OLED degradation. Simulation results indicate that the current error rates (CERs) are reduced to lower than 11.9% when the mobility variation of the driving TFT is ±30%, and 8.1% when the threshold voltage shift of the driving TFT is ±0.5 V, for the entire data input range.
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In this paper, we proposed a novel voltage-programmed pixel circuit based on amorphous indium gallium zinc oxide thin-film transistor (a-InGaZnO TFT) for active-matrix organic light-emitting display (AMOLED) with an enhanced electrical stability and uniformity. Through an extensive simulation work based on a-InGaZnO TFT and OLED experimental data, we confirm that the proposed pixel circuit can compensate for both mobility variation and threshold voltage shift of the driving TFT.
AMOLED
Oxide thin-film transistor
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The stability of thin-film transistors (TFTs) with amorphous InAlZnO (a-IAZO) thin films as the channel layers was investigated. The devices annealed at 300 °C had a large threshold voltage (Vth) shift under gate voltage sweep, while the devices annealed at 400 °C were quite stable. The S value of the transfer characteristic curve was effectively reduced after 400 °C annealing as compared to 300 °C annealing. X-ray photo-electron spectroscopy results also showed oxygen deficiencies decreased as the annealing temperature increased. The improvement of TFTs stability might attribute to the reduction of trap states related to oxygen deficiencies. The 400 °C annealed a-IAZO TFTs exhibited small positive shift of threshold voltages under bias stress conditions, suggesting the a-IAZO might be a promising candidate for application in TFTs.
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In this paper we compare and justify the advantage of CNTFET devices over MOSFET devices in nanometer regime. Thereafter we have analyzed the effect of chiral vector, and temperature on threshold voltage of CNTFET device. After simulation on HSPICE tool we observed that the high threshold voltage can be achieved at low chiral vector pair. It is also observed that the effect of temperature on threshold voltage of CNTFET is negligibly small. After analysis of channel length variation and their impact on threshold voltage of CNTFET as well as MOSFET devices, we found an anomalous result that the threshold voltage increases with decreasing channel length in CNTFET devices, this is quite contrary to the well known short channel effect. It is observed that at below 10 nm channel length the threshold voltage is increased rapidly in case of CNTFET device whereas in case of MOSFET device the threshold voltage decreases drastically below 10 nm channel length.
Channel length modulation
Short-channel effect
Reverse short-channel effect
Leakage (economics)
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We investigate the electrical stress-induced instability in amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with Sm2O3 gate dielectrics. Tow-step electrical degradation behavior in Sm2O3 a-IGZO TFT devices was found under high gate and drain voltage stress during 1000 s. A typical small positive shift followed by an unusual negative shift of threshold voltage is characterized in our TFT devices. We believe that the positive shift of the threshold voltage is due to charge trapping in the gate dielectric and/or at the channel/dielectric interfaces, while the negative shift of threshold voltage can be attributed to the generation of extra electrons from oxygen vacancies in the a-IGZO channel. We suggested that the amount of oxygen vacancies and the quality of the high-κ gate dielectric probably affect the degradation behavior of a-IGZO TFT devices.
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A driving method of pixel circuit using amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) is proposed to improve the image quality of active matrix light-emitting diode displays. The proposed pixel circuit employs a diode-connected structure to compensate for variation in threshold voltage (Vth) of the a-IGZO TFT. In addition, the proposed driving method adopts negative bias annealing to suppress the Vth shift. The annealing time is optimized based on the experimental observation of the minimum Vth shift. After a stress time of 30000 s, the measurement results show that the Vth shift is reduced by 29.6%, using an optimized annealing time of 5% of one frame time. In addition, the maximum deviation in the emission current using the proposed driving method was measured to be less than 4.32% after a stress time of 30 000 s.
AMOLED
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