Extreme Thinned-Wafer Bonding Using Low Temperature Curable Polyimide for Advanced Wafer Level Integrations
Julien BertheauFumihiro InoueAlain PhommahaxayLan PengSerena IacovoNouredine RassoulErik SleeckxKenneth RebibsAndy MillerGerald BeyerEric BeyneAtsushi Nakamura
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Abstract:
Extreme thinned wafer transfer technologies have been demonstrated by combining a selected set of temporary and permanent bonding materials. The extreme thinning was performed on the backside of a top wafer bonded on carrier wafer with the temporary glue material, subsequently followed by grinding, polishing and plasma dry etching to a final thickness of 5 μm. The properties of the temporary adhesive have been selected to be compatible with a permanent thermocompression bond of the extreme thin wafer to a final target substrate. Thus, the high thermal deformation resistance of the temporary adhesive is key. As we are dealing with extremely thin substrate, the required process uniformity and total thickness variation of each material are crucial. Hence after the spin-coating, the permanent bond polymer was planarized by a surface planer process. The performance benefit brought by this process and the final transfer steps will also be discussed.Keywords:
Wafer Bonding
Adhesive Bonding
Chemical Mechanical Planarization
Thermocompression bonding
Die preparation
TSV fabrication consists of five major processes: via formation, via filling, wafer thinning, wafer handling, and die/wafer bonding [1-2]. Wafer thinning is one of key TSV processes which contributes more than 20% of TSV manufacturing cost and should be studied in a systematic manner. In wafer thinning process, especially for ultra-thin wafers, a reliable handling system is indispensable. The best known solution for thin wafer handling system is based on perforated carrier wafers, which are bonded by an adhesive to the customer wafer and de-bonded by solvent release of the adhesive [3]. The internal structure of the carrier wafer is important, which can affect several crucial parameters of the customer wafer after thinning process, such as wafer warpage and flatness. etc. Therefore, a feasible and satisfactory design for thin wafer handling is strongly demanded. In this paper, a low cost and reliable carrier system is presented. In our system, a novel room temperature debonding process can be achieved, and a carrier wafer with specific internal structure was designed.
Flatness (cosmology)
Wafer backgrinding
Die preparation
Wafer testing
Wafer Bonding
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With great demand of high-end applications such as high-integration microelectronics, system-in-packaging (SiP), power application and flexible ICs, a device wafer needs to be thinned down and further structured, for example, fabrication of through-silicon via for the improved performance. Therefore, handling of ultrathin wafer (less than 100¿m in thickness) becomes a great challenge for both front-end and back-end processes. In current practice, a supportive carrier substrate inclusive of silicon, ceramic, glass and tape is used to protect the thinned device wafer from cracking and deforming and make front-end, assembly and test easier to process. The materials used for bonding the device wafer onto the above mentioned substrates play a critical role in the fabrication of ultrathin devices and high-performance packages. This paper covers two parts: temporary bonding of a device wafer onto a carrier wafer and debonding after completion of the entire through-silicon-via (TSV) process. The purpose of temporary bonding is to attach the device wafer onto the rigid carrier substrate prior to the back-grinding and subsequent processes and thus prevent cracking and chipping of thinned device wafer. The temporary bonding agent allows the release of the device wafer using different approaches such as heat, UV and solvent, etc. The bonding defects such as delamination, bubbling, thickness variation and chemical attack are discussed. Much endeavor is put onto the temporary bonding materials and process optimization. Two types of temporary bonding adhesives are studied to bond a device wafer onto a glass wafer.
Wafer backgrinding
Microelectronics
Wafer Bonding
Die preparation
Anodic bonding
Wafer testing
Wafer-level packaging
Wafer fabrication
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The optimization of the temporary wafer bonding process for thin wafers handling is reported. Two temporary bonding materials are evaluated with two low temperature cure (200degC) dielectrics. TGA results show that the dielectric materials are more stable at high temperature (260degC) with not more than 1% weight loss while the temporary bonding adhesives gave a higher weigh loss of 5.5%. It is found that optimal dehydration bake on both device and carrier wafer can create a void-free bonding. The dielectric and bonding material compatibility is also important to prevent temporary bonding from voiding.
Wafer Bonding
Void (composites)
Bonding strength
Adhesive Bonding
Anodic bonding
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Flattening
Adhesive Bonding
Wafer Bonding
Anodic bonding
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After temporary bonding and thinning process, many backside processes will be conducted on the thinned wafer. The critical processes for thin wafer handling material are high temperature and high vacuum processes. In this article, a quick adhesive selecting method is proposed. Backside process of PECVD SiO 2 is identified as the most critical process for thin wafer handling material selection. Two thermal plastic thin wafer handling materials are used in this study for 300 mm wafers and thermal compress bonding in a vacuum chamber is used for bonding process. After bonding, the wafer is thinned down to 50 μm by a commercialized grinder and the PECVD SiO 2 process is conducted on the thinned wafer. Many dishes were found after PECVD SiO 2 process because there is outgassing from the thin wafer handling material or from the device/carrier wafer surface. In this research, an additional hold time is proposed to reduce the dishing after PECVD SiO 2 process. Different hold time at 210 °C and different bonding time are evaluated. For the bonding process without hold time, large voids are observed. There are also 29 dishes on the surface of the wafer. By adding additional 5 minutes hold time before bonding, the number of the dishing on the wafer surface reduced from 29 to 6. If the hold time is set to 10 minutes, only 4 dishes were found on the wafer surface. From the evaluation result of these two thermal plastic thin wafer handling materials, B-glue seems much better than A-glue. The hold time seems very critical on void reduction during bonding process. From B-glue on PECVD SiO 2 experiment, 10 minutes hold time has the better performance for void reduction. The bonding process with zero hold time has the worst performance which has many voids after PECVD SiO 2 process. An ultra-thin 300 mm wafer with a thickness less than 7 μm is also demonstrated in this research by using B-glue and 10 minutes hold time.
Wafer Bonding
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Citations (1)
A 3D stacked IC technology has promoted technological developments to satisfy the great demand for high-end applications such as flexible ICs, system-in-packaging (SiP), high-integration microelectronics, and power application. Temporary wafer bonding has become a critical element in device processing over the past decades. The release layer and adhesive materials used for bonding a device wafer onto a carrier wafer play a key role in the manufacture of ultrathin devices and high-performance packages. We optimize the process integration and manufacturing aspects of the release layer in a temporary wafer bonding process, which is used for three-dimensional integrated circuits (3D IC) package. We provide optical performance data on the materials and attempt to establish a standard route for temporary wafer bonding in order to cost-effective and increase the reliability and yield of integration schemes. This manuscript covers three parts: focused ion beam (FIB) observation the morphology of the release layer, temporary bonding of a device wafer onto a carrier wafer, and de-bonding of the wafer from the carrier. The purpose of release layer observation is to identify its thickness and monitor the morphology of the release layer. Temporary bonding can attach the device wafer onto the carrier wafer prior to the back-grinding for preventing thinned device wafer chipping or cracking. The wafer bonding defect and thickness variation are discussed. It is noticed that the critical step in temporary bonding is plasma active process for forming a release layer. Hence, three types of plasma active release layers are assessed to bond a device wafer onto a silicon wafer. Plasma active time starts from 360 seconds reduced to 120 seconds and 100 seconds, the corrugated release layer becomes much flatter. Three bonded stacks are debonded by SUSS DB12T de-bonder to qualify the performance of the temporary bonding process. Bonded stack with maximum plasma active time is failed for de-bonding, less of them are succeeded in wafer separating process.
Wafer testing
Microelectronics
Wafer Bonding
Die preparation
Wafer backgrinding
Wire bonding
Anodic bonding
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This paper shows the result of working out the operations of permanent bonding of Si-Si wafers and temporary bonding of Si-quartz wafers. The equipment was selected for the process of applying a thin-film material to increase the uniformity of the thickness of the adhesive, anti-adhesive, and photoresist layers. Also, the effects of flowing applied fluids to the back of the wafer are eliminated. The dependence of the thickness of the adhesive, anti-adhesive, and photoresist layers on the speed of rotation of the centrifuge was experimentally determined. It was compared with material developers' data. The curvature of the assembly does not exceed 10 μm after permanent bonding of Si-Si wafers with a diameter of 150 mm and a thickness of 675 μm. In the process of temporary bonding, the thickness of the device Si wafer after thinning was 93 ± 3 μm. The deflection of the thinned assembly does not exceed 30 μm.
Photoresist
Adhesive Bonding
Wafer Bonding
Anodic bonding
Thermocompression bonding
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Permanent and temporary adhesives have been developed for the fabrication of multi-layer stacks using ultra-thin wafers of a few micrometers or less. The material properties required for thinning and bonding of 300 mm wafers in the wafer-on-wafer (WOW) process are: (1) thermal stability of the adhesive in the wafer stacking process, and (2) matching of the operating temperatures of the temporary and permanent adhesives. Here, the performance of permanent and temporary adhesives is described. Previously, the rigid body pendulum method was used to measure the material viscosity of the permanent and temporary adhesives to determine the temperature conditions for the wafer bonding and thermal de-bonding processes. In this paper, the possibility of mechanical de-bonding of the temporary adhesive at room temperature is reported. Furthermore, the performance of the permanent adhesive was evaluated with respect to thermal resistance for outgassing and weight loss under high-temperature conditions, as well as thermal cycling test resistance under conditions other than those previously reported.
Wafer-scale integration
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We have developed permanent and temporary adhesives that are suitable for fabricating multilevel stacks using ultra-thin wafers of several micrometers or less [1]. In this paper, we describe a hot-melt type temporary adhesive layer with a thickness of 10 μm formed on a device wafer using a spin-on technique for bumpless TSV interconnect applications. After stacking the device wafer on a carrier, the device wafer was thinned to approximately 10 μm with a grinding and polishing processes. In the permanent bonding process, an approximately 2.5 μm-thick permanent adhesive layer was formed on the thinned wafer by the spin-on technique, and a thin wafer was stacked on top. There were no voids between the stacked wafers. After the carrier was removed, residual temporary adhesive was removed by using a conventional solvent. The permanent adhesive coating had excellent thermal stability, low warpage due to the thinness of the layer and the low curing shrinkage, strong adhesion strength to SiO 2 and Si, and a good etching profile. Moreover, low contact resistivity and fine uniformity of the vertical TSV interconnects were achieved in a stack of 300 mm wafers. By using our material as an adhesive, efficient stacking of devices will be achieved.
Wafer Bonding
Spin Coating
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The ZoneBOND™ process has been developed to allow temporary wafer bonding at acceptable temperatures (usually less than 200°C), survival through higher-temperature processes, and then demounting at room temperature. The technology utilizes standard silicon or glass carriers and current thermoplastic adhesives developed by Brewer Science, Inc. The separation process consists of three components: removal of the adhesive in the outer zone, lamination of the device side of the pair, and separation of the carrier wafer from the adhesive. Developments of these key areas are the focus of this paper.
Wafer Bonding
Lamination
Die preparation
Anodic bonding
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Citations (5)