Bipolar transistor equivalents in CMOS technology
0
Citation
3
Reference
10
Related Paper
Abstract:
A CMOS circuit element equivalent to a bipolar junction transistor (BJT) which provides symmetrical performances of npn/pnp and ideality factor programming is proposed. Simulation showed that the /spl beta/, and Early voltage are superior to those of a typical BJT below about 1.65 GHz in a 0.8 /spl mu/m CMOS technology and the fabricated prototype has 2.3/spl times/10/sup -16/ A of I/sub S/, 2.4 mA of I/sub KF/ and 390 V of Early voltage.Keywords:
Integrated injection logic
Summary form only given. CMOS is a very attractive technology for digital circuits because it offers full rail-to-rail output swings and greater noise margins than NMOS circuits. CMOS also provides active loads for linear circuits. Implementation of CMOS in silicon carbide (SiC) devices is expected to provide reliable circuits for high temperature operation. However, previous implementations of CMOS in SiC resulted in very high PMOS threshold voltages. This requires a high supply voltage, which is not desirable for high temperature operations. In this paper, we present the first CMOS digital IC in 6H-SiC to operate with a single 5 V power supply.
Integrated injection logic
Cite
Citations (10)
The factors favoring room-temperature CMOS as a replacement for emitter-coupled logic (ECL) technology are presented. Room-temperature CMOS's integration scale. logic-function capabilities of basic circuits, wire length of logic signal nets, and power in system environments are discussed. To evaluate the possibilities of CMOS as a replacement technology, a VLSI chip model is studied.< >
Integrated injection logic
Logic level
Emitter-coupled logic
Cite
Citations (14)
This paper describes the integration of vertically aligned carbon nanofibers (VACNF) with the CMOS integrated circuits fabricated with commercial CMOS processes. The growth temperature of VACNF is about 700degC (Merkulov et al., 2001) which is well above the maximum operating temperature of CMOS circuits. In order to integrate VACNF with CMOS circuits, a method is described to transfer the separately grown VACNF onto the CMOS circuit
Integrated injection logic
Cite
Citations (0)
We studied bipolar junction transistors. We will see that the bipolar junction transistor, often referred to by its short name, transistor, actually functions as a current-controlled current source. We will also see that in the current generation of bipolar junction transistors, both majority and minority carriers are involved. For this reason, they gave this name to this type of transistor. In order to get enough information about this part, in the first two parts we will examine the construction and working method of the transistor. After that, we dedicate sections to how the transistor is placed in different combinations and the characteristics of the transistor in each combination.
Heterostructure-emitter bipolar transistor
Multiple-emitter transistor
Bipolar transistor biasing
Static induction transistor
Cite
Citations (1)
Nowadays, complementary-metal-oxide-semiconductor (CMOS) is widely used in large scale integrated circuits. In this paper, two typical cases of Very Large Scale Integration (VLSI) are selected. CMOS technology is compared with other two commonly used technologies (Transistor-Transistor logic (TTL) and Emitter-coupled logic (ECL)), and the advantages of CMOS technology are analyzed. In the gate array, because of the advantages of temperature stability, stronger anti-noise ability and lower power consumption, CMOS technology is widely used. In the 5G communication, the cost of CMOS technology is much lower than it of ECL. The speed disadvantage of CMOS is also compensated for by certain technologies. For these reasons, CMOS technology is widely used in VLSI. This paper also prospects the improvement space of other technologies, and how to improve other technologies can make it more widely used in VLSI is discussed. Taking advantage of the gain advantage could help TTL technology become more mainstream in some types of integrated circuits, and solving the cost problem could lead to significant improvements in ECL technology.
Integrated injection logic
Cite
Citations (5)
To reduce the power consumption, a 4:1 multiplexer using the CMOS logic is presented for high-speed operation. The proposed circuit adopts tree-type and half-rate structure. The CMOS logic, such as the dynamic CMOS and pseudo-static CMOS logic, is renewed in this design. The designed circuit is realized in a standard 0.18 μm CMOS process and uses 1.8 V supply voltage. The post simulated result shows that the fully integrated MUX operates well up to 10 Gb/s. The simulated eye opening is 200 mV pp on an external 50 Ohm load. The power consumption of the MUX is 53.3 mW at 10 Gb/s. The overall chip has a size of 0.575×0.475 mm 2 and the core size is 0.18×0.12 mm 2 .
Integrated circuit design
Logic level
Cite
Citations (8)
Two new static CMOS logic circuits called the CMOS clamped-swing logic and the CMOS differential clamped-swing logic are proposed and analyzed. In these two new logic circuits, the internal circuit used to realize the logic functions has a small voltage swing, whereas the output signal has a normal swing compatible with other CMOS logic. Both new logic circuits allow a complex function to be implemented within a single gate and achieve a high operation speed. They show a good trade-off among speed, area, DC power dissipation, and noise margin. They can be used along with the conventional CMOS circuits. Thus, design flexibility and speed performance of digital CMOS ICs can be further enhanced.< >
Pull-up resistor
Integrated injection logic
Logic level
Adiabatic circuit
Noise margin
AND-OR-Invert
Resistor–transistor logic
Cite
Citations (0)
There is no doubt that static CMOS circuits are the best candidate for low-power and high-packing density applications. However, its performance degrades with increasing the fan-in. In this paper, a novel fast CMOS circuit that is based on a current race is presented and compared with the conventional CMOS logic from the points of view of area, power consumption, and average-time delay. The scheme is verified by simulation adopting the 45 nm CMOS technology with Vdd = 1 V and a 25% reduction in the average propagation delay for a six-input NAND gate is achieved.
Integrated injection logic
Cite
Citations (1)
The scaling trends of monolithic 3-D (M3-D) complementary metal-oxide-semiconductor (CMOS) nanoelectromechanical (NEM) reconfigurable logic (RL) circuits are compared with CMOS-only circuits for the first time. It is confirmed that M3-D CMOS-NEM RL circuits are superior to CMOS-only circuits in terms of propagation delay, power consumption, and power-delay product (PDP) because of the low resistance and full signal swing of NEM memory switches that not only affect the current switch block but also the following block. Because the performance, power, and energy gains of the CMOS-NEM RL circuits over CMOS-only circuits increase as the technology node improves, M3-D CMOS-NEM RL circuits can be considered as one of the most promising candidates for high-density, high-performance, and low-power RL circuits.
Integrated injection logic
Adiabatic circuit
Cite
Citations (9)
The paper aims at demonstrating experimentally that the tiny Electro Magnetic (EM) coupling between the tip end of a micro-antenna is sufficient to locally and directly inject power into CMOS Integrated Circuits (IC). More precisely, experimental results show that such electrical couplings are sufficient to disturb, with and without removing the IC package, the behavior of 90nm CMOS Ring Oscillators, a representative structure of CMOS logic but also a constituting element of some True Random Number Generators (TRNGs) or clock generator.
Integrated injection logic
Pull-up resistor
Inductive coupling
Cite
Citations (41)