Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference
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This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40-200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.Keywords:
Subthreshold conduction
Atmospheric temperature range
This paper describes the application of two-dimensional device simulation to an investigation of the subthreshold characteristics of prototype batches of CMOS/SOI transistors fabricated using high energy oxygen implantation. A model is proposed which employs excess oxygen related donors distributed both spatially through the silicon film and in energy across the bandgap. Incorporation of this mdoel i n the two-dimensional simulator has permitted accurate prediction of both the threshold voltages and subthreshold slopes of p-channel and n-channel transistors.
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Abstract A simulation based novel and unique approach of controlling and modulating the threshold voltage sensitivity of a short channel surrounding gate MOSFET biosensor is investigated for improved biosensing applications. Different results show that the biosensor with symmetric doping is more sensitive to charged and neutral biomolecules when compared with the asymmetric doping. Threshold voltage sensitivity and subthreshold slope sensitivity of 4.5 and 0.44 have been obtained which shows the significance of doping attributed sensitivity. It is so find that sensitivity increases on increasing drain to source voltage because of stronger horizontal electric field across the channel. A remarkable percentage change due to the doping variation shows the improved biosensing action in terms of threshold voltage change and subthreshold slope change.
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Subthreshold slope
Overdrive voltage
Drain-induced barrier lowering
Reverse short-channel effect
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A new short-channel threshold voltage model based on an analytic solution of the two-dimensional Poisson equation in the depletion region under the gate of an MOS transistor (MOSTs) is presented. A simple closed-form expression for the variation of threshold voltage as a function of drain voltage, substrate bias, channel length, oxide thickness, and channel doping is derived. An exponential dependence on channel length and a linear dependence on drain and substrate biases is prediced for the reduction in the short-channel threshold voltage. These results are in qualitative and quantitative agreement with simulated and experimental results reported in literature. The predictions for the threshold voltage and subthreshold drain current are in close agreement with measured characteristics of MOS transistors down to submicron dimensions. The closed-form expressions for the threshold voltage and subthreshold drain current are well suited for circuit simulation and for determining performance limits of MOSTs.
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Drain-induced barrier lowering
Channel length modulation
Overdrive voltage
Subthreshold slope
Reverse short-channel effect
Biasing
Poisson's equation
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This correspondence extends Iniguez's results [see ibid., vol. 42, no. 9, p. 1712, 1995] to give threshold voltage expression with higher computational efficiency, and extends the surface potential model at threshold voltage [see ibid., vol. 40, no. 1, p. 86, 1993] to subthreshold operation.
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Semiconductor device modeling
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This paper has studied subthreshold characteristics for double gate(DG) MOSFET using Gaussian function in solving Poisson's equation. Typical two dimensional analytical transport models have been presented for symmetrical Double Gate MOSFETs (DGMOSFETs). Subthreshold swing and threshold voltage are very important factors for digital devices because of determination of ON and OFF. In general, subthreshold swings have to be under 100mV/dec, and threshold voltage roll-off small in short channel devices. These models are used to obtain the change of subthreshold swings and threshold voltage for DGMOSFET according to channel doping profiles. Also subthreshold swings and threshold voltages have been analyzed for device parameters such as channel length, channel thickness and channel doping profiles.
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Global variability of UTBB MOSFETs in subthresh-old and off regimes is analyzed. Variability of the off-state drain current, subthreshold slope, DIBL, gate leakage current, threshold voltage and their correlations are considered. It is demonstrated that subthreshold drain current variability is not only dependent on the threshold voltage variability, but the effective body factor (incorporating short-channel effects) must also be taken into account.
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Drain-induced barrier lowering
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Leakage (economics)
Gate voltage
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This paper introduces a new doping profile for devices to be used in subthreshold circuits. Results show that the optimised device with the proposed doping profile offers higher ON current in the subthreshold region. In this paper, threshold voltage modelling has been performed and a comparative analysis is presented between super-threshold and sub-threshold devices. We have also analysed the subthreshold swing characteristics of the device with the proposed doping profiles. Our analysis shows that better subthreshold swing and less threshold voltage variation can be achieved using our new doping profile.
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A physically-based technique for measuring the threshold voltage of small geometry MOSFETs is presented. The new method, called the quasi-constant current (QCC) method, is based on the drain current equation in the subthreshold region. It defines the threshold voltage as the gate voltage required for surface band-bending of 2ϕF. Compared with some other commonly used methods, this technique has the advantages of better fitting accuracy in the subthreshold region, of extracting the threshold voltage, VTH, with a unique value based on a physical definition of the surface band-bending, and of being suitable for MOS devices over a wide range of voltage biases, device dimensions, and temperatures.
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Reverse short-channel effect
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New two-dimensional analytical models for the potential distribution and the subthreshold factor in SOI MOSFET are developed and extensive study of 0.1 ?m SOI MOSFET design is performed. It is shown that the ultra-thin SOI films and high doping concentrations are necessary to obtain high subthreshold slopes in SOI MOSFETs.
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In this paper analytical threshold voltage and subthreshold current model for lightly-doped p-channel symmetric Double-Gate (DG) MOSFET in nanoscale regime have been presented. Analytical equation of potential distribution in the channel has been derived by solving the Poisson's equation with the constraint of weak inversion region. Threshold voltage equation of the device has been derived from the inversion charge sheet density at maximum potential position. Subthreshold current model of the device has been derived by augmenting the core drain current model with one of the short-channel effect ie. threshold voltage roll-off. Physical effect like surface roughness scattering has been incorporated in the subthreshold current model. The obtained results from threshold voltage model as a function of channel length and silicon body thickness and subthreshold current model have been found in good agreement with simulation results obtained from device simulator Atlas.
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Subthreshold slope
Drain-induced barrier lowering
Poisson's equation
Channel length modulation
Reverse short-channel effect
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