Analysis and design of linear finite state machines for signature analysis testing
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The authors present a theoretical investigation of the aliasing error probability (AEP) in signature analysis testing by means of linear finite state machines (LFSMs). The equations of the resulting Markov chain model of the LFSM are solved to determine an exact expression of the AEP as a function of the main LFSM features and of the relevant parameters of the testing environment. This expression is used to prove criteria for the synthesis of LFSMs with minimum asymptotic and transient AEP. A fundamental lower bound on the AEP is presented, which represents the performance limit of any LFSM with respect to aliasing minimization. It is shown that the AEP in machines realizing counters mod 2/sup k/-1 is the closest to such a bound, in particular periodically reaching it.< Keywords:
Aliasing
Signature (topology)
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Minification
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Aliasing, which is the mapping of a faulty circuit's signature onto the fault-free signature, is a major problem in signature analysis. The authors present a new design technique (ALFRED) for zero aliasing based on the concept of sequence detection. For a test sequence of length n, the length of the signature in ALFRED is Theta (log n). The authors reduce the circuit complexity by adopting a shift-register-like structure that minimizes the logical dependencies of all but one of the flip-flops. They relate the theory of balanced functions to ALFRED, and demonstrate the feasibility of the approach by using it to design a signature analyzer for a carry-lookahead adder.< >
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We define the Analytical signature, the Hodge signature and the de Rham signature for a foliated manifold with boundary with foliation transverse to the boundary. We show that all these signatures coincide and a Hirzebruch formula is valid.
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This paper reconsiders the problem of the design of optimal signature registers for BIST applications. Different strategies should be considered in designing multiple-input and single-input registers. For multiple-input registers, aliasing minimization cannot be the only guiding criterion: it is shown that the performance of a register with regards to aliasing depends strongly on the nature of the circuit under test and on the effects of the fault at its outputs. It is therefore preferable to choose a register that performs satisfactorily regardless of the circuit tested and of the test length chosen, i.e. a maximally reliable register. Registers based on primitive feedback polynomials are identified as the most reliable, in terms of asymptotic as well as transient behavior of the aliasing probability.< >
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This paper presents parallel signature design techniques that guarantee the aliasing probability to be less than 2/L, where L is the test length. Using y signature samples, a parallel signature analysis design is proposed that guarantees the aliasing probability to be less than (y/L)/sup y/2/. Inaccuracies and incompleteness in previously published bounds on the aliasing probability are discussed. Simple bounds on the aliasing probability are derived for parallel signature designs using primitive polynomials.
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Crucial image resolution may be lost when spatially aliased data are imaged with Kirchhoff algorithms that employ standard antialiasing methods. To maximize resolution, I introduce a method that enables the proper imaging of some aliased components in the data, while avoiding aliasing artifacts. The proposed method is based on a detailed analysis of the different types of aliasing that affect Kirchhoff imaging. In particular, it is based on the observation that operator aliasing depends on the dip spectrum of the data. A priori knowledge on the characteristics of the dip spectrum of the data, in particular on its asymmetry, can thus be exploited to enable “imaging beyond aliasing.” The method is not of general applicability, but it successfully improves the image resolution when a priori assumptions on the data dips are realistic. The imaging of salt‐dome flanks in the Gulf of Mexico has been enhanced by the application of the proposed method.
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Recent predictions about the aliasing behavior of linear feedback shift registers used in signature analysis with pseudorandom testing are validated experimentally. It is shown that the independent error model accurately predicts aliasing in these signature registers when test sets are selected at random. In practice, however, a circuit's test set is fixed, and it is shown that adopting a more general asymmetric error model, of which the independent is a special case, yields more accurate aliasing information, especially in the dynamic or non-steady-state region of the aliasing profile. The only additional information needed to apply the asymmetric model to signature analysis is the fault-free sequence. Since this sequence is needed in any case to compute the fault-free signature, the model can reflect test set ordering at no extra cost.< >
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This paper presents a signature analysis method that achieves a minimum aliasing rate. A fault stay map derived from exact fault simulation without fault dropping indicates whether a fault remains in an output data compressor at each time step. The fault stay map is used to determine the timing of multiple signature observations to achieve the minimum aliasing rate under certain constraints. Experimental results for some combinational circuits modeled on a single stuck-at fault are presented. They show that only two signature observations are required to achieve 0% aliasing in almost all circuits.< >
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Signature analyzers are very efficient output response compactors in BIST techniques. The only limitation of signature analysis is the fault coverage reduction (aliasing) due to the information loss inherent to any data compaction. In this paper, in order to increase the effectiveness of RAM BIST, we fake advantage from the regularity of the RAM test algorithms and we show that aliasing-free signature analysis can be achieved in RAM BIST.
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Signature (topology)
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Design for testing
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Signature (topology)
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Alias
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