Perceptron Based Filtering of Futile Prefetches in Embedded VLIW DSPs

Abstract Prefetching has been widely used in general purpose computers, especially in high performance CPUs, but has been much less used in DSPs and embedded processors. The goal of this paper is to investigate adding a perceptron, a single layer neural network [1], to straight-forward hardware prefetching techniques for embedded DSPs, and assess their performance improvement. By using industry standard benchmarks we come to the conclusion that the use of a perceptron to improve the prefetch decision making significantly reduces the number of accesses from external memory via shared buses without any significant performance impact. We show that using a perceptron in addition to a prefetch mechanism results in a reduction of 70% on average in the number of accesses to external memory relative to accesses performed using the prefetch mechanism alone. The bandwidth reduction is achieved without any significant performance loss.