High performance graphene FETs with self-aligned buried gates fabricated on scalable patterned ni-catalyzed graphene

For the first time, we report a scalable technique to fabricate graphene transistors with self-aligned buried gates process. The high performance buried-gate graphene transistor has excellent field-effect mobility of 6,100cm 2 /V·s and 24,000 cm 2 /V·s before and after subtraction of contact resistance. To the best of our knowledge, this is the highest room temperature mobility for CVD graphene FETs reported to date. This result paves the way for manufacturable high quality graphene transistor technology.