Harmonic rejection mixer at ADC input for complex IF dual carrier receiver architecture

This paper presents a receiver architecture for intra-band dual-carrier reception as specified for the upcoming releases of 3GPP HSPA and LTE standards. It is based on a time-discrete harmonic rejection complex-IF mixer to limit the bandwidth requirements on the ADCs to that of a single carrier. The mixer has been designed and fabricated together with a 3 rd order continuous-time ΔΣ-ADC for proof-of-concept evaluation. Measurements show at least 68dB rejection at 2 nd to 4 th LO harmonic.