Vector-Splitting Method to Reduce Common-Mode Voltages in Two-Level Inverters for Grid Connection

This article proposes a new pulsewidth modulation (PWM) strategy to reduce common-mode voltages (CMVs) in grid-connected two-level inverters. Reduction of CMVs is an important issue in the field of distributed energy resources (DERs) because CMVs at a high switching frequency cause ground leakage currents that lead to safety issues in the applications of DERs. In the proposed PWM strategy, each reference vector is split into two vectors during the PWM period. The peak-to-peak magnitude of CMV is reduced by one-third as the split vectors are synthesized without using zero vectors. The influence of the dead-time and its compensation in the proposed method are also described. Our proposed method can be easily implemented with carrier-based PWM. Simulation and experimental results are presented to verify the performance of the proposed strategy.