A 3.1 to 5 GHz CMOS DSSS UWB transceiver for WPANs

2005 
A DSSS UWB transceiver using the 3.1 to 5 GHz band is implemented in 0.18 /spl mu/m CMOS and includes a programmable pulse shaping circuit in the transmitter, an LNA with a NF of 4 dB and a 6/sup th/-order active LPF with a bandwidth of 500 MHz in the receiver. Die area of the transceiver is around 9 mm/sup 2/. and the transceiver consumes 105 mW in the transmit mode and 280 mW in the receive mode from a 1.8 V supply.
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    2
    References
    92
    Citations
    NaN
    KQI
    []