A two-power-mode Si-CMOS/GaAs-HBT hybrid power amplifier module for 0.9-GHz-band W-CDMA handsets applications

2014 
This paper describes a power amplifier module (PAM) for 0.9-GHz WCDMA handsets applications. The PAM, assembled in a 3 mm × 3 mm package, features bulk Si-CMOS and GaAs-HBT hybrid architecture for pursuing low cost while maintaining high efficiency and high- and low-power mode (HPM and LPM) function required for commercially available PAM products. The CMOS die accommodates a driver stage for the HPM, two power stages for the LPM, and several RF switches in addition to their-related bias and switch control functions. In contrast, the GaAs die integrates only an InGaP-HBT power stage and its related bias block for the HPM. Measurements conducted under a condition of 0.9-GHz WCDMA modulation (3GPP, R99) and 3.4V power supply show the PAM can deliver a 28.5-dBm output power (Pout), a 44% power-added efficiency (PAE), and a −39-dBc adjacent channel leakage power ratio (ACLR1) in the HPM. In the LPM, 17 dBm of Pout and less than −4 0 dBc of ACLR1 are obtained with PAE as high as 20%.
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