Linearity of scanning probe lithography on [110] silicon wafer

Nanofabrication and fabrication of nanodevices on single-crystal silicon have been demonstrated by electric-field-enhanced local oxidation on the semiconductor materials using a scanning probe microscope (SPM). The advantages of the SPM lithography technique are its high resolution and absence of radiation damage in the substrate to be patterned. Scanning probe lithography (SPL) is highly depended on tip bias, tip force, scanning speed and air humidity of patterning environment. In this study, we have demonstrated that control of these four parameters to achieve nanopatterning on [110] silicon wafer such that the line width of desired nanopattern down to 25 nm can be easily obtained under control. The resistivity of silicon substrate is around 1-10 ohm-cm. The diameter of silicon SPM tip is around 10 nm. Samples were hydrogen-passivated by dipping in 10% aqueous HF solution for 15 sec to remove surface native oxide before performing SPM local oxidation process. The line/space SiO/sub x/ patterns on [110] silicon substrate were generated by SPM-based local oxidation. Then, anisotropic wet etching process was followed with a 34 wt.% aqueous KOH solution at 50/spl deg/C for 45 sec. Utilizing the orientation-dependent etching (ODE) of crystallographic planes, the line/space nano-structures with feature size down to 25 nm and aspect ratio larger than 8:1 with KOH wet etching were demonstrated. With multi-pixel scanning of SPL, we can control the pattern width and pattern height of local oxidation and then transferred these patterns into the silicon substrate with wet etching. We have successfully demonstrated accurate linear control of nano-structures fabrication for different linewidth from 25 to 77 nm by SPL technique. The standard deviation (1 /spl sigma/) for 2:5 nm nanostructures is 3.01 nm.