Design and Implementation of a Temperature Self-Compensation Balanced Hybrid Ring Oscillator BHRO

The ring oscillator (RO) is applied to many modern circuits given its simplicity, low-area-cost, low-power. However, the temperature-drifting propagation delay of logic gates makes the RO a difficult solution for frequency reference design in deep submicron process. This work presents the design and implementation of a temperature self-compensation architecture based on a balanced hybrid ring oscillator (BHRO) for precise temperature compensation and clock-on-chip applications. The proposed BHRO is formed by both PTAT (proportional to the absolute temperature) and CTAT (complementary to absolute temperature) delay cells to implements RO-internal compensation. The features include temperature-self-compensation, process insensitive and low-area-cost. Four different test chips are fabricated in the 0.13μm CMOS process. The measurement result exhibits two performance-friendly BHRO architectures with a best temperature coefficient of 31 ppm/C over -55 Ό to 80 Ό, which is among the lowest to our best knowledge. The output compensated frequency is verified to be adjustable varying from 6.95 MHz to 26.5MHz, which are the highest as we have known.