Readout of digital SiPMs

This work describes a detector system using digital silicon photomultipliers in a hybrid approach. It allows for the individual readout of each pixel by utilizing an active quenching and recharging circuit. Each pixel electronic occupies the same area as the sensor pixel, limiting the space of the electronics to 50 × 50 µm². 16-by-16 pixels with wired-OR trigger network, 12-bit time-to-digital converter, validation logic, controller and serializer form a macro pixel. The first detector prototype consists of a sensor chip from MPG-HLL, Munich, and a readout ASIC, developed by DESY, Hamburg, with dimension of a macro pixel including peripheral electronics and test circuits. The ASIC is designed and fabricated in GF’s 130-nm CMOS process and has a size of 1.9 × 2.1 mm². First measurements of the prototype were performed at room temperature. Dark events could be detected, counted and the corresponding time stamps could be read out. Dark-count rate as function of the bias voltage, TDC characteristics, data transmission limits, power consumption and space requirements are presented.