Analysis, sensitivity and macromodelling of the Elmore delay in linear networks for performance-driven VLSI design

The Elmore delay of a linear network has been accepted as a first-order approximation of signal delay in VLSI digital circuits. In this paper, a systematic theory for the analysis of the Elmore delay in a linear network is established from basic circuit theory. The theory is applied to the sensitivity of signal delays and the macromodelling of large networks.