A low power, variable resolution two-step flash ADC

In this paper, a new low power and configurable resolution two step flash ADC is proposed. Comparators of conventional flash ADC are replaced with CMOS inverters whose threshold can be varied dynamically. A novel peak-detector circuit is employed to achieve variable resolution as well as to switch the unused parallel inverters to standby mode. Linear reduction in resolution leads to exponential reduction in power. The ADC is capable of operating at 8-bit, 10-bit, and 12-bit precision and at a supply voltage of 2.5V; it consumes 16mW at 12-bit, 12mW at 10-bit and 8mW at 8-bit resolution. The sampling frequency ranges from 0.5 to 1.0 GSPS, and the ADC has a DNL