Abnormal hump in low temperature in SiGe devices with silicon capping insertion layer

In this study, comparison of capacitance-voltage (C-V) characteristics between silicon-germanium (SiGe) MOSCAPs with and without a silicon oxide capping layer were investigated. The SiGe channel with silicon oxide capping layer exhibits an improved C-V property at room temperature but has an abnormal shift and depression at low temperature (77K). We determined threshold voltage shift was induced by the Fermi-level when ambient temperature was changed. The addition silicon capping layer was responsible for introducing defects resulting in depression and hump in the C-V measurements. A physical model was established by modifying the alternating current (AC) pulse amplitude during the C-V measurement.