Self-Calibrating Equalizer for Optimal Jitter Performance Using On-chip Eye Monitoring

2011 
Magnitude of equalization applied by a receiver equalization circuit varies across silicon process and environmental conditions. We propose a novel method to auto calibrate a programmable receiver equalization circuit to a target gain equalization value without the use of any external test equipment or channel. This method is built upon on-chip eye monitoring and internal loop back capabilities, which are used to measure the gain equalization value. By executing this on-chip gain equalization measurement for various equalizer settings, the setting which produces equalization that is closest to the target value can be determined. This has been implemented in 45nm CMOS for a PCI Express 2.0 transceiver hardware running at 5Gbps. Lab results with test silicon demonstrate the on-chip eye height measurement capabilities.
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