Feasibility and Limitation of DC/DC Multilevel Converter Power ICs Using Standard CMOS Transistors

2019 
This paper investigates the feasibility and limitation of designing DC/DC converter power ICs using standard CMOS technology. Comparing to custom BCDMOS technologies, this path leads to lower cost and shorter development cycle time, benefiting from the high volume CMOS manufacturing ecosystem. Our study indicates that the flying capacitor multilevel converter (FCMC) topology can facilitate DC/DC conversion using standard CMOS transistors for an input voltage up to 15V for the 90nm/65nm CMOS nodes, and 12V for the 45nm CMOS node. The CMOS FCMC solution offers a much lower switching loss than the common buck converters using LDMOS transistors derived from the same CMOS platform. TCAD and IC circuit simulation are extensively used to explore this design concept for the case of a 7.5V to 1.5V 50MHz converter. The calculated power loss and MOSFET performance FOM are compared between the two solutions. A PCB level FCMC prototype using discrete low voltage MOSFETs is built and tested to validate this concept in lieu of a CMOS chip prototype. The physical limitation of this technical approach is also analyzed with extensive TCAD simulation.
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    7
    References
    4
    Citations
    NaN
    KQI
    []