Low power UTBOX and back plane (BP) FDSOI technology for 32nm node and below

This paper highlights the interest of FD-SOI with high-k and metal gate as a possible candidate for low power multimedia technology. The possibility of multi-V T by combining UTBOX with back plane, back biasing, variable TiN thickness and Al 2 O 3 in the gate stack is demonstrated. The viability of these approaches is corroborated via mobility and reliability measurements. Dual gate oxide co-integrated devices are reported. The effectiveness of back biasing for short devices is demonstrated through ring oscillators and 0.299µm² SRAM bitcells performance reflecting that the conventional bulk reverse and forward back biasing approaches to manage the circuit static power and the dynamic performances are fully compatible with FDSOI. Finally, thanks to a hybrid FDSOI/bulk co-integration with UTBOX all IP's required in a SOC could be demonstrated for LP applications.