A startup circuit for even-stage differential ring oscillators

If not properly initiated, even-stage ring oscillators may resonate in undesirable ways. When this occurs, their output frequency can be higher than expected and they can no longer be employed as VCOs in PLL designs. In this paper, we analyze this issue and then we propose a novel startup circuit that can be used in differential, even-stage ring oscillators. This design is produced using a 0.30 µm CMOS process. Measurements performed on test chips show that our circuit always prevents spurious oscillation modes from arising. On the contrary, if the proper startup is disabled, unwanted modes may occur, especially at low temperatures or with little bias current. Moreover, consisting of just two MOSFETs per oscillator stage, the proposed circuit is also very simple and efficient in terms of area and power dissipation.