A CMOS ΔΣ fractional-n frequency synthesizer with quantization noise pushing technique

A ΔΣ fractional-N frequency synthesizer with a quantization noise pushing technique is implemented in a 0.18 mum CMOS technology. The in-band phase noise can be lowered by 12 dB, and the out-band phase noise contributed by the ΔΣ modulator can be reduced by more than 15 dB with this technique. The power consumption is 26.8mW from a 2V supply.