Finite element modeling predicts the effects of voids on thermal shock reliability and thermal resistance of power device

Three-dimensional finite element modeling (FEM) analysis was conducted to investigate the effects of the void size and location on the reliability of Sn-Ag-Cu heat-sink attachment. The results showed that void size does not have a significant effect on the strain/stress distribution, unless it is near the corner of the solder attachment, a location originally with higher stress. This is generally in agreement with the experimental results that a heat-sink attachment with an average of 37.5% void can survive more than 3000 cycles of thermal shock at -40° to 125°C. The void size had a significant effect on thermal dissipation. A 20% voids would cause the chip temperature to rise more than 5.1°C, which would obviously degrade the reliability of the device. Compared to void size, the location of voids is less significant. Void size of 10% at a different location causes chip temperature variation around 1°C.