Design and analysis of Dadda multiplier with Common Boolean Logic

Abstract Multiplier is the primary origin of compression algorithms. Multiplier analysis is used to expand the representation which is used in the healthcare sector to improve operating efficiency. With the help of a compressor, the multiplier can be used to provide data. According to human visual levels, the inaccurate data can also be used to simplify the data in specific signal processing, without the impact of the previous data. The multiplier can be used for high speed and less area in developing high operating frequency semiconductor, the enhanced data can be compared with different multipliers using Xilinx 14.7 simulation and synthesis correspondences. The strategy used for the multiplier to provide the constraints of low area, high speed, high frequency in multiplier operations with the help of the multiple compression techniques of generated data. This paper's objective provides best results correspondence to the different multipliers. The multiplier can be used in the advancement of high operating frequency semiconductor for high speed and less area.