Phase-change memory technology with self-aligned μTrench cell architecture for 90 nm node and beyond

2008 
A novel self-aligned μTrench-based cell architecture for phase change memory (PCM) process is presented. The low programming current and the good dimensional control of the sub-lithographic features achieved with the μTrench structure are combined with a self-aligned patterning strategy that simplify the integration process in term of alignment tolerances and of number of critical masks. The proposed architecture has been integrated in a 90 nm 128 Mb vehicle based on a pnp bipolar junction transistor for the array selection. The good active and leakage currents achieved by the purposely optimized selecting transistors combined with programming currents of 300 μA of the storage element and good distributions measured on the 128 Mb array demonstrate the suitability of the proposed architecture for the production of high-density PCM arrays at 90 nm and bevond.
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