A post-CMOS compatible smart yarn technology based on SOI wafers

Abstract Smart yarn and intelligent textiles have been extensively researched recently due to their significant roles in various entertainment, healthcare and military applications. However, most smart yarns and textiles developed so far do not come with sophisticated functionality due to the difficulty of integrating silicon-based sensors and CMOS (complementary metal-oxide-semiconductor) circuits. This paper reports an SOI (silicon-on-insulator)–CMOS compatible technology to fabricate smart yarn, enabling the monolithic and invisible integration of CMOS and sensors. A tubular shaped parylene smart yarn design with a reinforcing polydimethylsiloxane (PDMS) core has been developed. Isotropic XeF 2 silicon etching and conformal parylene coating were used to form the outer shell and release the electronic/sensing components from an SOI wafer. To prove the concept, silicon strain gauges and MOSFETs (metal-oxide-semiconductor field-effect-transistors) were integrated. Human arterial blood pulse detection on the wrist by a smart yarn fiber integrated with a silicon strain gauge has been demonstrated.