Convolution algorithm for implementing 2D discrete wavelet transform on the FPGA
2016
Nowadays, the two dimensional discrete wavelet transform 2D-DWT has become a very important tool in the field of image processing. Several architectures for implementing DWT are proposed. In this paper we present an architecture for implementing the DWT based on the convolution algorithm. This implementation is fully described in VHDL and implemented in an FPGA component.
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