Reliable execution of statechart-generated correct embedded software under soft errors
2014
This paper proposes a design methodology for fault-tolerant embedded systems development that starts from software specification and goes down to hardware execution. The proposed design methodology uses formally verified and correct-by-construction software created from high-level UML statechart models for software specification and implementation. On the hardware reliability side, this paper uses the MoMa architecture for reliable embedded computing which we deploy as a soft-core onto an off-the-shelf FPGA. MoMa introduces architectural innovations that support the semantics of the UML statechart execution in a reliable fashion. The proposed design methodology is evaluated with a real automotive case study based on an exhaustive FPGA-implemented fault injection campaign.
Keywords:
- Software reliability testing
- Software construction
- Computer architecture
- Computer science
- Real-time computing
- Package development process
- Avionics software
- Resource-oriented architecture
- Software design description
- UML tool
- Software sizing
- Embedded software
- Software design
- Software fault tolerance
- Embedded system
- Software requirements specification
- UML state machine
- Correction
- Source
- Cite
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