Low-Sensitivity Design of Allpass Based Fractional Delay Digital Filters

Conventional linear digital circuits are providing usually a delay response that is equal to an integer number of sampling intervals (as in linear-phase FIR (finite-impulse-response) realizations) or is changing uncontrollably with the frequency (for all IIR (infinite-impulseresponse) digital filters). It appeared, however, that we might often need a circuit with a delay response that is a fraction of the sampling interval and is fixed or variable (or only adjustable). Design and implementation of such circuits with given and properly controlled fractional delay (FD) is the hottest digital filters topic in the last ten years. These circuits are invaluable in many telecommunications applications, like time adjustment and precise jitter elimination in digital receivers, echo cancellation, phase-array antenna systems, transmultiplexers, sample-rate converter and software radio. They are needed in speech synthesis and processing, image interpolation, sigma-delta modulators, time-delay estimation, in some biomedical applications and for modeling of musical instruments. Most of these applications are overviewed in (Laakso et al., 1996) and (Valimaki & Laakso, 2001).