FPM 22.4 A Display Processor Conforming to All ATV Formats with 188-tap FIR Filters and 284 Kb FLFO Memories

Natsuko Matsuo,Shiro Hosotani,Minobu Yazawa,Satoshi Sugawa,Naoki Hayashi,Takashi Shinohara,Masahiko Takashima,Keisuke Okada,Tadashi Sumi

FPM 22.4 A Display Processor Conforming to All ATV Formats with 188-tap FIR Filters and 284 Kb FLFO Memories

1997

Natsuko Matsuo
Shiro Hosotani
Minobu Yazawa
Satoshi Sugawa
Naoki Hayashi
Takashi Shinohara
Masahiko Takashima
Keisuke Okada
Tadashi Sumi

An ATV full format acceptable display processor has been developed. The WETS (write end toggle signal) based design scheme and the optimized hard wired approach have been employed to get a single chip solution.

Keywords:

single chip
Finite impulse response
Scheme (programming language)
Signal
Computer hardware
Computer science

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