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An FPGA-based parallel sorting architecture for the Burrows Wheeler transform.
An FPGA-based parallel sorting architecture for the Burrows Wheeler transform.
2005
José Francisco Martínez-Trinidad
Rene Cumplido-Parra
Claudia Feregrino-Uribe
Keywords:
Field-programmable gate array
parallel sorting
Burrows–Wheeler transform
Architecture
Parallel computing
Computer science
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