An efficient LDPC encoder architecture for space applications

2016 
Quasi-Cyclic Low-Density Parity-Check Codes (QC-LDPC) have been recently adopted by the Consultative Committee for Space Data Systems (CCSDS) as recommended standard for channel coding in near-earth (C2) and deep-space (AR4JA) communications. Existing QC-LDPC encoder architectures proposed in the literature so far, are optimized for other standards (e.g. DVB-S2, IEEE 802.11e), but they are not suitable for efficient implementations for the specific CCSDS codes. In this paper, we introduce for the first time a novel encoder architecture, suitable for these codes. The architecture is a parallel implementation based on a series of recursive convolutional encoders and it leverages the inherent parallelism of generator's matrix QC structure to boost throughput performance. Furthermore, the generic definition of key encoder's parameters provides increased flexibility in terms of latency, FPGA resources and speed. In the special case of C2 code for near-earth communications, a novel architecture is introduced to efficiently handle the challenges arising from the generator's matrix circulant size (511 bits), which is not a power of 2. The proposed encoders operate on a continuous uninterrupted stream of input data and implement all the functions specified by CCSDS data-link layer protocols (i.e. framing, synchronization and randomization). The efficiency of the introduced architecture is demonstrated on a Xilinx XUPV5 development board, achieving multi-Gbps throughput and a significant speed-up when compared with existing approaches.
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