Reliability of Multiple Oxides Integrated with thin $HfSiO_x$ gate Dielectric on Thick $SiO_2$ Layers

Reliability and performance in metal gate/high-k device with multiple gate dielectrics were investigated. MOSFETs with a thin layer on a thermal Si02 dielectric as gate dielectrics exhibit excellent mobility and low interface trap density. However, the distribution of threshold voltages of stack devices were wider than those of and single layer devices due to the penetration of Hf and/or intermixing of with underlying . The results of TZDB and SILC characteristics suggested that a certain portion of layer reacted with the underlying thick layer, which in turn affected the reliability characteristics.